The present invention relates to a buffering circuit, and more particularly to a high linearity buffering circuit.
A buffer is an important circuit in the analog circuit field. Normally, a buffer is utilized for converting an input signal into an output signal having a driving capability different from the input signal one while maintaining the characteristic carried by the input signal.
The buffer plays a critical role in a wireless communication system. In the wireless communication system, a receiver is utilized for receiving an RF (radio frequency) signal with a frequency band ranged around a few hundred mega hertz (MHz) or around a few giga hertz (GHz). FIG. 1 is a diagram illustrating a conventional receiver 10 of the wireless communication system. The receiver 10 comprises an antenna 11, a low-noise amplifier (LNA) 12, a local oscillator 13, a mixer 14, a programming gain amplifier (PGA) 15, a filter 16, a buffer 17, and an analog-to-digital converter (ADC) 18. A transmitted signal Str is first received by the antenna 11. The antenna 11 then converts the transmitted signal Str in the form of electromagnetic waves into a received signal Sr in the form of electrical signal. Meanwhile, the low-noise amplifier 12 is utilized to amplify the received signal Sr for suppressing the noise component of the received signal Sr in order to generate a low noise signal Ss. The low noise signal Ss has an appropriate signal to noise ratio (SNR) for a specified modulation and is fed to the mixer 14 for frequency down-conversion by the local oscillator 13 to generate a down converted signal Sd. The programming gain amplifier 15 and the filter 16 selectively filter and amplify the down converted signal Sd to further enhance the SNR performance and perform a good adjacent channel or blocker suppression upon the down converted signal Sd. Normally, the analog-to-digital converter 18 performs with a high dynamic range (DR) and good SNR in the wireless communication system, and thus the gain of the programming gain amplifier 15 and the cost of the filter 16 can be reduced. However, the buffer 17 with high linearity must be coupled between the filter 16 and the analog-to-digital converter 18 to provide enough driving capability for the analog signal Sa to be fed to the analog-to-digital converter 18. Therefore, providing a buffer with good linearity and large driving capability is a significant concern in the analog circuit field.